VirtualC64 v5.0 beta
Commodore 64 Emulator
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PeddleTypes.h
1// -----------------------------------------------------------------------------
2// This file is part of Peddle - A MOS 65xx CPU emulator
3//
4// Copyright (C) Dirk W. Hoffmann. www.dirkwhoffmann.de
5// Published under the terms of the MIT License
6// -----------------------------------------------------------------------------
7
8#pragma once
9
10#include "Types.h"
11#include "PeddleDebuggerTypes.h"
12
13namespace vc64::peddle {
14
15//
16// Constants
17//
18
19static constexpr isize LOG_BUFFER_CAPACITY = 256;
20
21static constexpr isize C_FLAG = 0x01;
22static constexpr isize Z_FLAG = 0x02;
23static constexpr isize I_FLAG = 0x04;
24static constexpr isize D_FLAG = 0x08;
25static constexpr isize B_FLAG = 0x10;
26static constexpr isize V_FLAG = 0x40;
27static constexpr isize N_FLAG = 0x80;
28
29
30//
31// Bit fields
32//
33
34// Interrupt source
35typedef u8 IntSource;
36
37/* State flags
38 *
39 * CPU_LOG_INSTRUCTION:
40 *
41 * This flag is set if instruction logging is enabled. If set, the
42 * CPU records the current register contents in a log buffer.
43 *
44 * CPU_CHECK_BP, CPU_CHECK_WP, CPU_CHECK_CP:
45 *
46 * These flags indicate whether the CPU should check for breakpoints,
47 * watchpoints, or catchpoints.
48 */
49static constexpr int CPU_LOG_INSTRUCTION = (1 << 0);
50static constexpr int CPU_CHECK_BP = (1 << 1);
51static constexpr int CPU_CHECK_WP = (1 << 2);
52static constexpr int CPU_CHECK_CP = (1 << 3);
53
54
55//
56// Enumerations
57//
58
60enum_long(CPUREV)
61{
62 MOS_6502,
63 MOS_6507,
64 MOS_6510,
65 MOS_8502
66};
67typedef CPUREV CPURevision;
68
69enum_long(ADDR_MODE)
70{
71 ADDR_IMPLIED,
72 ADDR_ACCUMULATOR,
73 ADDR_IMMEDIATE,
74 ADDR_ZERO_PAGE,
75 ADDR_ZERO_PAGE_X,
76 ADDR_ZERO_PAGE_Y,
77 ADDR_ABSOLUTE,
78 ADDR_ABSOLUTE_X,
79 ADDR_ABSOLUTE_Y,
80 ADDR_INDIRECT_X,
81 ADDR_INDIRECT_Y,
82 ADDR_RELATIVE,
83 ADDR_DIRECT,
84 ADDR_INDIRECT
85};
86typedef ADDR_MODE AddressingMode;
87
88enum_long(MICRO_INSTRUCTION) {
89
90 fetch,
91
92 JAM, JAM_2,
93
94 irq_2, irq_3, irq_4, irq_5, irq_6, irq_7,
95 nmi_2, nmi_3, nmi_4, nmi_5, nmi_6, nmi_7,
96
97 ADC_imm,
98 ADC_zpg, ADC_zpg_2,
99 ADC_zpg_x, ADC_zpg_x_2, ADC_zpg_x_3,
100 ADC_abs, ADC_abs_2, ADC_abs_3,
101 ADC_abs_x, ADC_abs_x_2, ADC_abs_x_3, ADC_abs_x_4,
102 ADC_abs_y, ADC_abs_y_2, ADC_abs_y_3, ADC_abs_y_4,
103 ADC_ind_x, ADC_ind_x_2, ADC_ind_x_3, ADC_ind_x_4, ADC_ind_x_5,
104 ADC_ind_y, ADC_ind_y_2, ADC_ind_y_3, ADC_ind_y_4, ADC_ind_y_5,
105
106 AND_imm,
107 AND_zpg, AND_zpg_2,
108 AND_zpg_x, AND_zpg_x_2, AND_zpg_x_3,
109 AND_abs, AND_abs_2, AND_abs_3,
110 AND_abs_x, AND_abs_x_2, AND_abs_x_3, AND_abs_x_4,
111 AND_abs_y, AND_abs_y_2, AND_abs_y_3, AND_abs_y_4,
112 AND_ind_x, AND_ind_x_2, AND_ind_x_3, AND_ind_x_4, AND_ind_x_5,
113 AND_ind_y, AND_ind_y_2, AND_ind_y_3, AND_ind_y_4, AND_ind_y_5,
114
115 ASL_acc,
116 ASL_zpg, ASL_zpg_2, ASL_zpg_3, ASL_zpg_4,
117 ASL_zpg_x, ASL_zpg_x_2, ASL_zpg_x_3, ASL_zpg_x_4, ASL_zpg_x_5,
118 ASL_abs, ASL_abs_2, ASL_abs_3, ASL_abs_4, ASL_abs_5,
119 ASL_abs_x, ASL_abs_x_2, ASL_abs_x_3, ASL_abs_x_4, ASL_abs_x_5, ASL_abs_x_6,
120 ASL_ind_x, ASL_ind_x_2, ASL_ind_x_3, ASL_ind_x_4, ASL_ind_x_5, ASL_ind_x_6, ASL_ind_x_7,
121
122 branch_3_underflow, branch_3_overflow,
123 BCC_rel, BCC_rel_2,
124 BCS_rel, BCS_rel_2,
125 BEQ_rel, BEQ_rel_2,
126
127 BIT_zpg, BIT_zpg_2,
128 BIT_abs, BIT_abs_2, BIT_abs_3,
129
130 BMI_rel, BMI_rel_2,
131 BNE_rel, BNE_rel_2,
132 BPL_rel, BPL_rel_2,
133
134 BRK, BRK_2, BRK_3, BRK_4, BRK_5, BRK_6,
135 BRK_nmi_4, BRK_nmi_5, BRK_nmi_6,
136
137 BVC_rel, BVC_rel_2,
138 BVS_rel, BVS_rel_2,
139 CLC,
140 CLD,
141 CLI,
142 CLV,
143
144 CMP_imm,
145 CMP_zpg, CMP_zpg_2,
146 CMP_zpg_x, CMP_zpg_x_2, CMP_zpg_x_3,
147 CMP_abs, CMP_abs_2, CMP_abs_3,
148 CMP_abs_x, CMP_abs_x_2, CMP_abs_x_3, CMP_abs_x_4,
149 CMP_abs_y, CMP_abs_y_2, CMP_abs_y_3, CMP_abs_y_4,
150 CMP_ind_x, CMP_ind_x_2, CMP_ind_x_3, CMP_ind_x_4, CMP_ind_x_5,
151 CMP_ind_y, CMP_ind_y_2, CMP_ind_y_3, CMP_ind_y_4, CMP_ind_y_5,
152
153 CPX_imm,
154 CPX_zpg, CPX_zpg_2,
155 CPX_abs, CPX_abs_2, CPX_abs_3,
156
157 CPY_imm,
158 CPY_zpg, CPY_zpg_2,
159 CPY_abs, CPY_abs_2, CPY_abs_3,
160
161 DEC_zpg, DEC_zpg_2, DEC_zpg_3, DEC_zpg_4,
162 DEC_zpg_x, DEC_zpg_x_2, DEC_zpg_x_3, DEC_zpg_x_4, DEC_zpg_x_5,
163 DEC_abs, DEC_abs_2, DEC_abs_3, DEC_abs_4, DEC_abs_5,
164 DEC_abs_x, DEC_abs_x_2, DEC_abs_x_3, DEC_abs_x_4, DEC_abs_x_5, DEC_abs_x_6,
165 DEC_ind_x, DEC_ind_x_2, DEC_ind_x_3, DEC_ind_x_4, DEC_ind_x_5, DEC_ind_x_6, DEC_ind_x_7,
166
167 DEX,
168 DEY,
169
170 EOR_imm,
171 EOR_zpg, EOR_zpg_2,
172 EOR_zpg_x, EOR_zpg_x_2, EOR_zpg_x_3,
173 EOR_abs, EOR_abs_2, EOR_abs_3,
174 EOR_abs_x, EOR_abs_x_2, EOR_abs_x_3, EOR_abs_x_4,
175 EOR_abs_y, EOR_abs_y_2, EOR_abs_y_3, EOR_abs_y_4,
176 EOR_ind_x, EOR_ind_x_2, EOR_ind_x_3, EOR_ind_x_4, EOR_ind_x_5,
177 EOR_ind_y, EOR_ind_y_2, EOR_ind_y_3, EOR_ind_y_4, EOR_ind_y_5,
178
179 INC_zpg, INC_zpg_2, INC_zpg_3, INC_zpg_4,
180 INC_zpg_x, INC_zpg_x_2, INC_zpg_x_3, INC_zpg_x_4, INC_zpg_x_5,
181 INC_abs, INC_abs_2, INC_abs_3, INC_abs_4, INC_abs_5,
182 INC_abs_x, INC_abs_x_2, INC_abs_x_3, INC_abs_x_4, INC_abs_x_5, INC_abs_x_6,
183 INC_ind_x, INC_ind_x_2, INC_ind_x_3, INC_ind_x_4, INC_ind_x_5, INC_ind_x_6, INC_ind_x_7,
184
185 INX,
186 INY,
187
188 JMP_abs, JMP_abs_2,
189 JMP_abs_ind, JMP_abs_ind_2, JMP_abs_ind_3, JMP_abs_ind_4,
190
191 JSR, JSR_2, JSR_3, JSR_4, JSR_5,
192
193 LDA_imm,
194 LDA_zpg, LDA_zpg_2,
195 LDA_zpg_x, LDA_zpg_x_2, LDA_zpg_x_3,
196 LDA_abs, LDA_abs_2, LDA_abs_3,
197 LDA_abs_x, LDA_abs_x_2, LDA_abs_x_3, LDA_abs_x_4,
198 LDA_abs_y, LDA_abs_y_2, LDA_abs_y_3, LDA_abs_y_4,
199 LDA_ind_x, LDA_ind_x_2, LDA_ind_x_3, LDA_ind_x_4, LDA_ind_x_5,
200 LDA_ind_y, LDA_ind_y_2, LDA_ind_y_3, LDA_ind_y_4, LDA_ind_y_5,
201
202 LDX_imm,
203 LDX_zpg, LDX_zpg_2,
204 LDX_zpg_y, LDX_zpg_y_2, LDX_zpg_y_3,
205 LDX_abs, LDX_abs_2, LDX_abs_3,
206 LDX_abs_y, LDX_abs_y_2, LDX_abs_y_3, LDX_abs_y_4,
207 LDX_ind_x, LDX_ind_x_2, LDX_ind_x_3, LDX_ind_x_4, LDX_ind_x_5,
208 LDX_ind_y, LDX_ind_y_2, LDX_ind_y_3, LDX_ind_y_4, LDX_ind_y_5,
209
210 LDY_imm,
211 LDY_zpg, LDY_zpg_2,
212 LDY_zpg_x, LDY_zpg_x_2, LDY_zpg_x_3,
213 LDY_abs, LDY_abs_2, LDY_abs_3,
214 LDY_abs_x, LDY_abs_x_2, LDY_abs_x_3, LDY_abs_x_4,
215 LDY_ind_x, LDY_ind_x_2, LDY_ind_x_3, LDY_ind_x_4, LDY_ind_x_5,
216 LDY_ind_y, LDY_ind_y_2, LDY_ind_y_3, LDY_ind_y_4, LDY_ind_y_5,
217
218 LSR_acc,
219 LSR_zpg, LSR_zpg_2, LSR_zpg_3, LSR_zpg_4,
220 LSR_zpg_x, LSR_zpg_x_2, LSR_zpg_x_3, LSR_zpg_x_4, LSR_zpg_x_5,
221 LSR_abs, LSR_abs_2, LSR_abs_3, LSR_abs_4, LSR_abs_5,
222 LSR_abs_x, LSR_abs_x_2, LSR_abs_x_3, LSR_abs_x_4, LSR_abs_x_5, LSR_abs_x_6,
223 LSR_abs_y, LSR_abs_y_2, LSR_abs_y_3, LSR_abs_y_4, LSR_abs_y_5, LSR_abs_y_6,
224 LSR_ind_x, LSR_ind_x_2, LSR_ind_x_3, LSR_ind_x_4, LSR_ind_x_5, LSR_ind_x_6, LSR_ind_x_7,
225 LSR_ind_y, LSR_ind_y_2, LSR_ind_y_3, LSR_ind_y_4, LSR_ind_y_5, LSR_ind_y_6, LSR_ind_y_7,
226
227 NOP,
228 NOP_imm,
229 NOP_zpg, NOP_zpg_2,
230 NOP_zpg_x, NOP_zpg_x_2, NOP_zpg_x_3,
231 NOP_abs, NOP_abs_2, NOP_abs_3,
232 NOP_abs_x, NOP_abs_x_2, NOP_abs_x_3, NOP_abs_x_4,
233
234 ORA_imm,
235 ORA_zpg, ORA_zpg_2,
236 ORA_zpg_x, ORA_zpg_x_2, ORA_zpg_x_3,
237 ORA_abs, ORA_abs_2, ORA_abs_3,
238 ORA_abs_x, ORA_abs_x_2, ORA_abs_x_3, ORA_abs_x_4,
239 ORA_abs_y, ORA_abs_y_2, ORA_abs_y_3, ORA_abs_y_4,
240 ORA_ind_x, ORA_ind_x_2, ORA_ind_x_3, ORA_ind_x_4, ORA_ind_x_5,
241 ORA_ind_y, ORA_ind_y_2, ORA_ind_y_3, ORA_ind_y_4, ORA_ind_y_5,
242
243 PHA, PHA_2,
244 PHP, PHP_2,
245 PLA, PLA_2, PLA_3,
246 PLP, PLP_2, PLP_3,
247
248 ROL_acc,
249 ROL_zpg, ROL_zpg_2, ROL_zpg_3, ROL_zpg_4,
250 ROL_zpg_x, ROL_zpg_x_2, ROL_zpg_x_3, ROL_zpg_x_4, ROL_zpg_x_5,
251 ROL_abs, ROL_abs_2, ROL_abs_3, ROL_abs_4, ROL_abs_5,
252 ROL_abs_x, ROL_abs_x_2, ROL_abs_x_3, ROL_abs_x_4, ROL_abs_x_5, ROL_abs_x_6,
253 ROL_ind_x, ROL_ind_x_2, ROL_ind_x_3, ROL_ind_x_4, ROL_ind_x_5, ROL_ind_x_6, ROL_ind_x_7,
254
255 ROR_acc,
256 ROR_zpg, ROR_zpg_2, ROR_zpg_3, ROR_zpg_4,
257 ROR_zpg_x, ROR_zpg_x_2, ROR_zpg_x_3, ROR_zpg_x_4, ROR_zpg_x_5,
258 ROR_abs, ROR_abs_2, ROR_abs_3, ROR_abs_4, ROR_abs_5,
259 ROR_abs_x, ROR_abs_x_2, ROR_abs_x_3, ROR_abs_x_4, ROR_abs_x_5, ROR_abs_x_6,
260 ROR_ind_x, ROR_ind_x_2, ROR_ind_x_3, ROR_ind_x_4, ROR_ind_x_5, ROR_ind_x_6, ROR_ind_x_7,
261
262 RTI, RTI_2, RTI_3, RTI_4, RTI_5,
263 RTS, RTS_2, RTS_3, RTS_4, RTS_5,
264
265 SBC_imm,
266 SBC_zpg, SBC_zpg_2,
267 SBC_zpg_x, SBC_zpg_x_2, SBC_zpg_x_3,
268 SBC_abs, SBC_abs_2, SBC_abs_3,
269 SBC_abs_x, SBC_abs_x_2, SBC_abs_x_3, SBC_abs_x_4,
270 SBC_abs_y, SBC_abs_y_2, SBC_abs_y_3, SBC_abs_y_4,
271 SBC_ind_x, SBC_ind_x_2, SBC_ind_x_3, SBC_ind_x_4, SBC_ind_x_5,
272 SBC_ind_y, SBC_ind_y_2, SBC_ind_y_3, SBC_ind_y_4, SBC_ind_y_5,
273
274 SEC,
275 SED,
276 SEI, SEI_cont,
277
278 STA_zpg, STA_zpg_2,
279 STA_zpg_x, STA_zpg_x_2, STA_zpg_x_3,
280 STA_abs, STA_abs_2, STA_abs_3,
281 STA_abs_x, STA_abs_x_2, STA_abs_x_3, STA_abs_x_4,
282 STA_abs_y, STA_abs_y_2, STA_abs_y_3, STA_abs_y_4,
283 STA_ind_x, STA_ind_x_2, STA_ind_x_3, STA_ind_x_4, STA_ind_x_5,
284 STA_ind_y, STA_ind_y_2, STA_ind_y_3, STA_ind_y_4, STA_ind_y_5,
285
286 STX_zpg, STX_zpg_2,
287 STX_zpg_y, STX_zpg_y_2, STX_zpg_y_3,
288 STX_abs, STX_abs_2, STX_abs_3,
289
290 STY_zpg, STY_zpg_2,
291 STY_zpg_x, STY_zpg_x_2, STY_zpg_x_3,
292 STY_abs, STY_abs_2, STY_abs_3,
293
294 TAX,
295 TAY,
296 TSX,
297 TXA,
298 TXS,
299 TYA,
300
301 // Illegal instructions
302
303 ALR_imm,
304 ANC_imm,
305 ANE_imm,
306 ARR_imm,
307 AXS_imm,
308
309 DCP_zpg, DCP_zpg_2, DCP_zpg_3, DCP_zpg_4,
310 DCP_zpg_x, DCP_zpg_x_2, DCP_zpg_x_3, DCP_zpg_x_4, DCP_zpg_x_5,
311 DCP_abs, DCP_abs_2, DCP_abs_3, DCP_abs_4, DCP_abs_5,
312 DCP_abs_x, DCP_abs_x_2, DCP_abs_x_3, DCP_abs_x_4, DCP_abs_x_5, DCP_abs_x_6,
313 DCP_abs_y, DCP_abs_y_2, DCP_abs_y_3, DCP_abs_y_4, DCP_abs_y_5, DCP_abs_y_6,
314 DCP_ind_x, DCP_ind_x_2, DCP_ind_x_3, DCP_ind_x_4, DCP_ind_x_5, DCP_ind_x_6, DCP_ind_x_7,
315 DCP_ind_y, DCP_ind_y_2, DCP_ind_y_3, DCP_ind_y_4, DCP_ind_y_5, DCP_ind_y_6, DCP_ind_y_7,
316
317 ISC_zpg, ISC_zpg_2, ISC_zpg_3, ISC_zpg_4,
318 ISC_zpg_x, ISC_zpg_x_2, ISC_zpg_x_3, ISC_zpg_x_4, ISC_zpg_x_5,
319 ISC_abs, ISC_abs_2, ISC_abs_3, ISC_abs_4, ISC_abs_5,
320 ISC_abs_x, ISC_abs_x_2, ISC_abs_x_3, ISC_abs_x_4, ISC_abs_x_5, ISC_abs_x_6,
321 ISC_abs_y, ISC_abs_y_2, ISC_abs_y_3, ISC_abs_y_4, ISC_abs_y_5, ISC_abs_y_6,
322 ISC_ind_x, ISC_ind_x_2, ISC_ind_x_3, ISC_ind_x_4, ISC_ind_x_5, ISC_ind_x_6, ISC_ind_x_7,
323 ISC_ind_y, ISC_ind_y_2, ISC_ind_y_3, ISC_ind_y_4, ISC_ind_y_5, ISC_ind_y_6, ISC_ind_y_7,
324
325 LAS_abs_y, LAS_abs_y_2, LAS_abs_y_3, LAS_abs_y_4,
326
327 LAX_zpg, LAX_zpg_2,
328 LAX_zpg_y, LAX_zpg_y_2, LAX_zpg_y_3,
329 LAX_abs, LAX_abs_2, LAX_abs_3,
330 LAX_abs_y, LAX_abs_y_2, LAX_abs_y_3, LAX_abs_y_4,
331 LAX_ind_x, LAX_ind_x_2, LAX_ind_x_3, LAX_ind_x_4, LAX_ind_x_5,
332 LAX_ind_y, LAX_ind_y_2, LAX_ind_y_3, LAX_ind_y_4, LAX_ind_y_5,
333
334 LXA_imm,
335
336 RLA_zpg, RLA_zpg_2, RLA_zpg_3, RLA_zpg_4,
337 RLA_zpg_x, RLA_zpg_x_2, RLA_zpg_x_3, RLA_zpg_x_4, RLA_zpg_x_5,
338 RLA_abs, RLA_abs_2, RLA_abs_3, RLA_abs_4, RLA_abs_5,
339 RLA_abs_x, RLA_abs_x_2, RLA_abs_x_3, RLA_abs_x_4, RLA_abs_x_5, RLA_abs_x_6,
340 RLA_abs_y, RLA_abs_y_2, RLA_abs_y_3, RLA_abs_y_4, RLA_abs_y_5, RLA_abs_y_6,
341 RLA_ind_x, RLA_ind_x_2, RLA_ind_x_3, RLA_ind_x_4, RLA_ind_x_5, RLA_ind_x_6, RLA_ind_x_7,
342 RLA_ind_y, RLA_ind_y_2, RLA_ind_y_3, RLA_ind_y_4, RLA_ind_y_5, RLA_ind_y_6, RLA_ind_y_7,
343
344 RRA_zpg, RRA_zpg_2, RRA_zpg_3, RRA_zpg_4,
345 RRA_zpg_x, RRA_zpg_x_2, RRA_zpg_x_3, RRA_zpg_x_4, RRA_zpg_x_5,
346 RRA_abs, RRA_abs_2, RRA_abs_3, RRA_abs_4, RRA_abs_5,
347 RRA_abs_x, RRA_abs_x_2, RRA_abs_x_3, RRA_abs_x_4, RRA_abs_x_5, RRA_abs_x_6,
348 RRA_abs_y, RRA_abs_y_2, RRA_abs_y_3, RRA_abs_y_4, RRA_abs_y_5, RRA_abs_y_6,
349 RRA_ind_x, RRA_ind_x_2, RRA_ind_x_3, RRA_ind_x_4, RRA_ind_x_5, RRA_ind_x_6, RRA_ind_x_7,
350 RRA_ind_y, RRA_ind_y_2, RRA_ind_y_3, RRA_ind_y_4, RRA_ind_y_5, RRA_ind_y_6, RRA_ind_y_7,
351
352 SAX_zpg, SAX_zpg_2,
353 SAX_zpg_y, SAX_zpg_y_2, SAX_zpg_y_3,
354 SAX_abs, SAX_abs_2, SAX_abs_3,
355 SAX_ind_x, SAX_ind_x_2, SAX_ind_x_3, SAX_ind_x_4, SAX_ind_x_5,
356
357 SHA_ind_y, SHA_ind_y_2, SHA_ind_y_3, SHA_ind_y_4, SHA_ind_y_5,
358 SHA_abs_y, SHA_abs_y_2, SHA_abs_y_3, SHA_abs_y_4,
359
360 SHX_abs_y, SHX_abs_y_2, SHX_abs_y_3, SHX_abs_y_4,
361 SHY_abs_x, SHY_abs_x_2, SHY_abs_x_3, SHY_abs_x_4,
362
363 SLO_zpg, SLO_zpg_2, SLO_zpg_3, SLO_zpg_4,
364 SLO_zpg_x, SLO_zpg_x_2, SLO_zpg_x_3, SLO_zpg_x_4, SLO_zpg_x_5,
365 SLO_abs, SLO_abs_2, SLO_abs_3, SLO_abs_4, SLO_abs_5,
366 SLO_abs_x, SLO_abs_x_2, SLO_abs_x_3, SLO_abs_x_4, SLO_abs_x_5, SLO_abs_x_6,
367 SLO_abs_y, SLO_abs_y_2, SLO_abs_y_3, SLO_abs_y_4, SLO_abs_y_5, SLO_abs_y_6,
368 SLO_ind_x, SLO_ind_x_2, SLO_ind_x_3, SLO_ind_x_4, SLO_ind_x_5, SLO_ind_x_6, SLO_ind_x_7,
369 SLO_ind_y, SLO_ind_y_2, SLO_ind_y_3, SLO_ind_y_4, SLO_ind_y_5, SLO_ind_y_6, SLO_ind_y_7,
370
371 SRE_zpg, SRE_zpg_2, SRE_zpg_3, SRE_zpg_4,
372 SRE_zpg_x, SRE_zpg_x_2, SRE_zpg_x_3, SRE_zpg_x_4, SRE_zpg_x_5,
373 SRE_abs, SRE_abs_2, SRE_abs_3, SRE_abs_4, SRE_abs_5,
374 SRE_abs_x, SRE_abs_x_2, SRE_abs_x_3, SRE_abs_x_4, SRE_abs_x_5, SRE_abs_x_6,
375 SRE_abs_y, SRE_abs_y_2, SRE_abs_y_3, SRE_abs_y_4, SRE_abs_y_5, SRE_abs_y_6,
376 SRE_ind_x, SRE_ind_x_2, SRE_ind_x_3, SRE_ind_x_4, SRE_ind_x_5, SRE_ind_x_6, SRE_ind_x_7,
377 SRE_ind_y, SRE_ind_y_2, SRE_ind_y_3, SRE_ind_y_4, SRE_ind_y_5, SRE_ind_y_6, SRE_ind_y_7,
378
379 TAS_abs_y, TAS_abs_y_2, TAS_abs_y_3, TAS_abs_y_4
380};
381typedef MICRO_INSTRUCTION MicroInstruction;
382
383
384//
385// Structures
386//
387
388typedef struct
389{
390 bool n; // Negative flag
391 bool v; // Overflow flag
392 bool b; // Break flag
393 bool d; // Decimal flag
394 bool i; // Interrupt flag
395 bool z; // Zero flag
396 bool c; // Carry flag
397}
398StatusRegister;
399
400typedef struct
401{
402 u8 data; // Processor port register
403 u8 direction; // Processor port direction register
404}
405PPort;
406
407typedef struct
408{
409 u16 pc; // Program counter
410 u16 pc0; // Frozen program counter (beginning of current instruction)
411
412 u8 sp; // Stack pointer
413
414 u8 a; // Accumulator
415 u8 x; // First index register
416 u8 y; // Second index register
417
418 u8 adl; // Address data (low byte)
419 u8 adh; // Address data (high byte)
420 u8 idl; // Input data latch (indirect addressing modes)
421 u8 d; // Data buffer
422
423 bool ovl; // Overflow indicator (page boundary crossings)
424
425 StatusRegister sr;
426 PPort pport;
427}
428Registers;
429
430typedef struct
431{
432 u64 cycle;
433
434 u8 byte1;
435 u8 byte2;
436 u8 byte3;
437
438 u16 pc;
439 u8 sp;
440 u8 a;
441 u8 x;
442 u8 y;
443 u8 flags;
444}
445RecordedInstruction;
446
447typedef struct
448{
449 const char *prefix; // Prefix for hexidecimal numbers
450 u8 radix; // 10 (decimal) or 16 (hexadecimal)
451 bool upperCase; // Lettercase for hexadecimal digits A...F
452 char fill; // Fill charachter: ' ', '0', or 0 (no fill)
453 bool plainZero; // Determines whether 0 is printed with a prefix
454}
455DasmNumberFormat;
456
457typedef struct
458{
459 DasmNumberFormat numberFormat;
460 int tab;
461}
462DasmStyle;
463
464}