moira

Namespaces

Name	Description
`AV`
`FC`
`Flag`
`State`

Classes

Name	Description
`StackFrame`	Stack frame of an exception.
`StatusRegister`	Status register of the CPU.
`Registers`	Register file of the CPU.
`PrefetchQueue`	Prefetch queue of the CPU.
`CacheLine`	Line of the instruction cache.
`CacheLatch`	Latch of the instruction cache.
`InstructionCache`	Instruction cache of the CPU.
`CycleBudget`	Cycle budget of the CPU.
`InstrInfo`	Information about a decoded instruction.
`DasmNumberFormat`	Number format of the disassembler.
`DasmStyle`	Output style of the disassembler.
`IllegalInstruction`
`DoubleFault`
`AddressError`	Exception thrown on an address error.
`BusError`	Exception thrown on a bus error.

Enumerations

Name	Description
`Model`	CPU model.
`Core`	CPU core type.
`Syntax`	Syntax style of the disassembler.
`LetterCase`	Letter case of the disassembler output.
`Instr`	CPU instruction.
`Mode`	Addressing mode of a CPU instruction.
`Cond`	Condition code of a CPU instruction.
`M68kException`	CPU exception.
`IrqMode`	How an interrupt is delivered to the CPU.
`AddrSpace`	Address space of a CPU access.

Model

cpp

enum Model

Defined in Components/CPU/Moira/MoiraTypes.h:87

CPU model.

Value	Description
`M68000`
`M68010`
`M68EC020`
`M68020`
`M68EC030`
`M68030`
`M68EC040`
`M68LC040`
`M68040`

Core

cpp

enum Core

Defined in Components/CPU/Moira/MoiraTypes.h:102

CPU core type.

Value	Description
`C68000`
`C68010`
`C68020`

Syntax

cpp

enum Syntax

Defined in Components/CPU/Moira/MoiraTypes.h:111

Syntax style of the disassembler.

Value	Description
`MOIRA`
`MOIRA_MIT`
`GNU`
`GNU_MIT`
`MUSASHI`

LetterCase

cpp

enum LetterCase

Defined in Components/CPU/Moira/MoiraTypes.h:122

Letter case of the disassembler output.

Value	Description
`MIXED_CASE`
`LOWER_CASE`
`UPPER_CASE`

Instr

cpp

enum Instr

Defined in Components/CPU/Moira/MoiraTypes.h:131

CPU instruction.

Value	Description
`ABCD`
`ADD`
`ADDA`
`ADDI`
`ADDQ`
`ADDX`
`AND`
`ANDI`
`ANDICCR`
`ANDISR`
`ASL`
`ASR`
`BCC`
`BCS`
`BEQ`
`BGE`
`BGT`
`BHI`
`BLE`
`BLS`
`BLT`
`BMI`
`BNE`
`BPL`
`BVC`
`BVS`
`BCHG`
`BCLR`
`BRA`
`BSET`
`BSR`
`BTST`
`CHK`
`CLR`
`CMP`
`CMPA`
`CMPI`
`CMPM`
`DBCC`
`DBCS`
`DBEQ`
`DBGE`
`DBGT`
`DBHI`
`DBLE`
`DBLS`
`DBLT`
`DBMI`
`DBNE`
`DBPL`
`DBVC`
`DBVS`
`DBF`
`DBT`
`DIVS`
`DIVU`
`EOR`
`EORI`
`EORICCR`
`EORISR`
`EXG`
`EXT`
`ILLEGAL`
`JMP`
`JSR`
`LEA`
`LINE_A`
`LINE_F`
`LINK`
`LSL`
`LSR`
`MOVE`
`MOVEA`
`MOVEFCCR`
`MOVETCCR`
`MOVEFSR`
`MOVETSR`
`MOVEUSP`
`MOVEM`
`MOVEP`
`MOVEQ`
`MULS`
`MULU`
`NBCD`
`NEG`
`NEGX`
`NOP`
`NOT`
`OR`
`ORI`
`ORICCR`
`ORISR`
`PEA`
`RESET`
`ROL`
`ROR`
`ROXL`
`ROXR`
`RTE`
`RTR`
`RTS`
`SBCD`
`SCC`
`SCS`
`SEQ`
`SGE`
`SGT`
`SHI`
`SLE`
`SLS`
`SLT`
`SMI`
`SNE`
`SPL`
`SVC`
`SVS`
`SF`
`ST`
`STOP`
`SUB`
`SUBA`
`SUBI`
`SUBQ`
`SUBX`
`SWAP`
`TAS`
`TRAP`
`TRAPV`
`TST`
`UNLK`
`BKPT`
`MOVEC`
`MOVES`
`RTD`
`BFCHG`
`BFCLR`
`BFEXTS`
`BFEXTU`
`BFFFO`
`BFINS`
`BFSET`
`BFTST`
`CALLM`
`CAS`
`CAS2`
`CHK2`
`CMP2`
`cpBcc`
`cpDBcc`
`cpGEN`
`cpRESTORE`
`cpSAVE`
`cpScc`
`cpTRAPcc`
`DIVL`
`EXTB`
`MULL`
`PACK`
`RTM`
`TRAPCC`
`TRAPCS`
`TRAPEQ`
`TRAPGE`
`TRAPGT`
`TRAPHI`
`TRAPLE`
`TRAPLS`
`TRAPLT`
`TRAPMI`
`TRAPNE`
`TRAPPL`
`TRAPVC`
`TRAPVS`
`TRAPF`
`TRAPT`
`UNPK`
`CINV`
`CPUSH`
`MOVE16`
`PFLUSH`
`PFLUSHA`
`PFLUSHAN`
`PFLUSHN`
`PLOAD`
`PMOVE`
`PTEST`
`FABS`
`FADD`
`FBcc`
`FCMP`
`FDBcc`
`FDIV`
`FMOVE`
`FMOVEM`
`FMUL`
`FNEG`
`FNOP`
`FRESTORE`
`FSAVE`
`FScc`
`FSQRT`
`FSUB`
`FTRAPcc`
`FTST`
`FSABS`
`FDABS`
`FSADD`
`FDADD`
`FSDIV`
`FDDIV`
`FSMOVE`
`FDMOVE`
`FSMUL`
`FDMUL`
`FSNEG`
`FDNEG`
`FSSQRT`
`FDSQRT`
`FSSUB`
`FDSUB`
`FACOS`
`FASIN`
`FATAN`
`FATANH`
`FCOS`
`FCOSH`
`FETOX`
`FETOXM1`
`FGETEXP`
`FGETMAN`
`FINT`
`FINTRZ`
`FLOG10`
`FLOG2`
`FLOGN`
`FLOGNP1`
`FMOD`
`FMOVECR`
`FREM`
`FSCAL`
`FSGLDIV`
`FSGLMUL`
`FSIN`
`FSINCOS`
`FSINH`
`FTAN`
`FTANH`
`FTENTOX`
`FTWOTOX`
`ABCD_LOOP`
`ADD_LOOP`
`ADDA_LOOP`
`ADDX_LOOP`
`AND_LOOP`
`ASL_LOOP`
`ASR_LOOP`
`CLR_LOOP`
`CMP_LOOP`
`CMPA_LOOP`
`CMPM_LOOP`
`DBCC_LOOP`
`DBCS_LOOP`
`DBEQ_LOOP`
`DBGE_LOOP`
`DBGT_LOOP`
`DBHI_LOOP`
`DBLE_LOOP`
`DBLS_LOOP`
`DBLT_LOOP`
`DBMI_LOOP`
`DBNE_LOOP`
`DBPL_LOOP`
`DBVC_LOOP`
`DBVS_LOOP`
`DBF_LOOP`
`DBT_LOOP`
`EOR_LOOP`
`LSL_LOOP`
`LSR_LOOP`
`MOVE_LOOP`
`NBCD_LOOP`
`NEG_LOOP`
`NEGX_LOOP`
`NOT_LOOP`
`OR_LOOP`
`ROL_LOOP`
`ROR_LOOP`
`ROXL_LOOP`
`ROXR_LOOP`
`SBCD_LOOP`
`SUB_LOOP`
`SUBA_LOOP`
`SUBX_LOOP`
`TST_LOOP`

Mode

cpp

enum Mode

Defined in Components/CPU/Moira/MoiraTypes.h:206

Addressing mode of a CPU instruction.

Value	Description
`DN`
`AN`
`AI`
`PI`
`PD`
`DI`
`IX`
`AW`
`AL`
`DIPC`
`IXPC`
`IM`
`IP`

Cond

cpp

enum Cond

Defined in Components/CPU/Moira/MoiraTypes.h:233

Condition code of a CPU instruction.

Value	Description
`BT`
`BF`
`HI`
`LS`
`CC`
`CS`
`NE`
`EQ`
`VC`
`VS`
`PL`
`MI`
`GE`
`LT`
`GT`
`LE`

M68kException

cpp

enum M68kException

Defined in Components/CPU/Moira/MoiraTypes.h:255

CPU exception.

Value	Description
`RESET`
`BUS_ERROR`
`ADDRESS_ERROR`
`ILLEGAL`
`DIVIDE_BY_ZERO`
`CHK`
`TRAPV`
`PRIVILEGE`
`TRACE`
`LINEA`
`LINEF`
`FORMAT_ERROR`
`IRQ_UNINITIALIZED`
`IRQ_SPURIOUS`
`TRAP`
`BKPT`

IrqMode

cpp

enum IrqMode

Defined in Components/CPU/Moira/MoiraTypes.h:278

How an interrupt is delivered to the CPU.

Value	Description
`AUTO`
`USER`
`SPURIOUS`
`UNINITIALIZED`

AddrSpace

cpp

enum AddrSpace

Defined in Components/CPU/Moira/MoiraTypes.h:288

Address space of a CPU access.

Value	Description
`DATA`
`PROG`

Typedefs

Return	Name	Description
`int8_t`	`i8`
`int16_t`	`i16`
`int32_t`	`i32`
`long long`	`i64`
`uint8_t`	`u8`
`uint16_t`	`u16`
`uint32_t`	`u32`
`unsigned long long`	`u64`
`std::ptrdiff_t`	`isize`
`u8`	`Size`
`u64`	`Flags`

i8

cpp

using i8 = int8_t

Defined in Components/CPU/Moira/MoiraTypes.h:22

i16

cpp

using i16 = int16_t

Defined in Components/CPU/Moira/MoiraTypes.h:23

i32

cpp

using i32 = int32_t

Defined in Components/CPU/Moira/MoiraTypes.h:24

i64

cpp

using i64 = long long

Defined in Components/CPU/Moira/MoiraTypes.h:25

u8

cpp

using u8 = uint8_t

Defined in Components/CPU/Moira/MoiraTypes.h:26

u16

cpp

using u16 = uint16_t

Defined in Components/CPU/Moira/MoiraTypes.h:27

u32

cpp

using u32 = uint32_t

Defined in Components/CPU/Moira/MoiraTypes.h:28

u64

cpp

using u64 = unsigned long long

Defined in Components/CPU/Moira/MoiraTypes.h:29

isize

cpp

using isize = std::ptrdiff_t

Defined in Components/CPU/Moira/MoiraTypes.h:30

Size

cpp

using Size = u8

Defined in Components/CPU/Moira/MoiraTypes.h:37

Flags

cpp

using Flags = u64

Defined in Components/CPU/Moira/MoiraTypes.h:523

Functions

Return	Name	Description
`int`	`portSize` `static` `constexpr`
`bool`	`isRegMode` `constexpr`
`bool`	`isAbsMode` `constexpr`
`bool`	`isIdxMode` `constexpr`
`bool`	`isMemMode` `constexpr`
`bool`	`isPrgMode` `constexpr`
`bool`	`isDspMode` `constexpr`
`bool`	`isImmMode` `constexpr`

portSize

static constexpr

cpp

constexpr static int portSize(u8 dsack)

Defined in Components/CPU/Moira/MoiraTypes.h:75

isRegMode

constexpr

cpp

constexpr bool isRegMode(Mode M)

Defined in Components/CPU/Moira/MoiraTypes.h:223

isAbsMode

constexpr

cpp

constexpr bool isAbsMode(Mode M)

Defined in Components/CPU/Moira/MoiraTypes.h:224

isIdxMode

constexpr

cpp

constexpr bool isIdxMode(Mode M)

Defined in Components/CPU/Moira/MoiraTypes.h:225

isMemMode

constexpr

cpp

constexpr bool isMemMode(Mode M)

Defined in Components/CPU/Moira/MoiraTypes.h:226

isPrgMode

constexpr

cpp

constexpr bool isPrgMode(Mode M)

Defined in Components/CPU/Moira/MoiraTypes.h:227

isDspMode

constexpr

cpp

constexpr bool isDspMode(Mode M)

Defined in Components/CPU/Moira/MoiraTypes.h:228

isImmMode

constexpr

cpp

constexpr bool isImmMode(Mode M)

Defined in Components/CPU/Moira/MoiraTypes.h:229

Variables

Return	Name	Description
`Size`	`Unsized` `static` `constexpr`
`Size`	`Byte` `static` `constexpr`
`Size`	`Word` `static` `constexpr`
`Size`	`Long` `static` `constexpr`
`Size`	`Quad` `static` `constexpr`
`Size`	`Extended` `static` `constexpr`
`u8`	`DSACK_32` `static` `constexpr`
`u8`	`DSACK_16` `static` `constexpr`
`u8`	`DSACK_8` `static` `constexpr`
`u8`	`DSACK_WAIT` `static` `constexpr`

Unsized

static constexpr

cpp

Size Unsized = 0

Defined in Components/CPU/Moira/MoiraTypes.h:38

Byte

static constexpr

cpp

Size Byte = 1

Defined in Components/CPU/Moira/MoiraTypes.h:39

Word

static constexpr

cpp

Size Word = 2

Defined in Components/CPU/Moira/MoiraTypes.h:40

Long

static constexpr

cpp

Size Long = 4

Defined in Components/CPU/Moira/MoiraTypes.h:41

Quad

static constexpr

cpp

Size Quad = 8

Defined in Components/CPU/Moira/MoiraTypes.h:42

Extended

static constexpr

cpp

Size Extended = 12

Defined in Components/CPU/Moira/MoiraTypes.h:43

DSACK_32

static constexpr

cpp

u8 DSACK_32 = 0b00

Defined in Components/CPU/Moira/MoiraTypes.h:64

DSACK_16

static constexpr

cpp

u8 DSACK_16 = 0b01

Defined in Components/CPU/Moira/MoiraTypes.h:65

DSACK_8

static constexpr

cpp

u8 DSACK_8 = 0b10

Defined in Components/CPU/Moira/MoiraTypes.h:66

DSACK_WAIT

static constexpr

cpp

u8 DSACK_WAIT = 0b11

Defined in Components/CPU/Moira/MoiraTypes.h:67

moira ​

Namespaces ​

Classes ​

Enumerations ​

Model ​

Core ​

Syntax ​

LetterCase ​

Instr ​

Mode ​

Cond ​

M68kException ​

IrqMode ​

AddrSpace ​

Typedefs ​

i8 ​

i16 ​

i32 ​

i64 ​

u8 ​

u16 ​

u32 ​

u64 ​

isize ​

Size ​

Flags ​

Functions ​

portSize ​

isRegMode ​

isAbsMode ​

isIdxMode ​

isMemMode ​

isPrgMode ​

isDspMode ​

isImmMode ​

Variables ​

Unsized ​

Byte ​

Word ​

Long ​

Quad ​

Extended ​

DSACK_32 ​

DSACK_16 ​

DSACK_8 ​

DSACK_WAIT ​

moira

Namespaces

Classes

Enumerations

Model

Core

Syntax

LetterCase

Instr

Mode

Cond

M68kException

IrqMode

AddrSpace

Typedefs

i8

i16

i32

i64

u8

u16

u32

u64

isize

Size

Flags

Functions

portSize

isRegMode

isAbsMode

isIdxMode

isMemMode

isPrgMode

isDspMode

isImmMode

Variables

Unsized

Byte

Word

Long

Quad

Extended

DSACK_32

DSACK_16

DSACK_8

DSACK_WAIT